Abstract
Increasing visual working memory (WM) load causes a steep decline in recall precision about specific feature values (Wilken & Ma, 2004; Zhang & Luck, 2008; Bays & Husain, 2008), and causes neural representations in visual, parietal, and frontal cortex to weaken (Buschman et al, 2011; Emrich et al, 2013; Sprague et al, 2014). However, knowledge about the relative importance of different items can enable the flexible allocation of resources to maintain the most relevant items most precisely, mitigating the impact of these bottlenecks (Klyszejko et al, 2014; Emrich et al, 2017; Yoo et al, 2018). We hypothesized that prioritizing a WM representation sculpts its neural population response profile, resulting in a representation that is read out with reduced uncertainty (Ma et al, 2006; van Bergen et al, 2015). We scanned participants with fMRI while they performed a multi-item memory-guided saccade task. Participants precisely remembered two positions, each with a different response probability (66.7% vs 33.3%), over a delay, then reported one cued position with a saccade. Participants effectively used the cued probabilities to prioritize items in WM: endpoints of memory-guided saccades were more precise for the high-priority item and responses were faster. To evaluate the impact of prioritization on neural representations, we extended a recently-developed generative model based decoding approach (van Bergen et al, 2015) to estimate likelihood functions over spatial position for each of the two items. This allowed us to quantify the uncertainty with which each item was encoded by the population-level activation pattern. In visual field maps across occipital and parietal cortex, high- compared to low- priority items were decoded with lower neural uncertainty and with lower decoding error. Thus, the strategic allocation of WM resources sculpts the precision and uncertainty with which representations are encoded, revealing a key neural mechanism underlying voluntary control over memory quality.
Acknowledgement: NIH F32-EY028438 (TCS), NIH R01-EY027925 (CEC and WJM), and an NVidia Hardware Grant (TCS)